SMT High Density Design and DFM
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There are many things we need to know when we get into advanced designs using SMT. Needed is information for high density design rules, zero defect designs and a better understanding of the new requirements for "design for manufacturability". All this is covered in this book. To improve your ability to design with zero defects we have structured the book in a sequence paralleling the designing of the product. You will find the book will prepare you to ask the correct questions at the correct time to prevent redesigns and costly mistakes. To design high density products, there are several helpful items in this publication. Included in this publication are multiple sets of design rules for standard, high density and ultra-high density designs not published anywhere else. The placement guidelines are very useful as well as information on how to put vias into lands under certain conditions, and how to modify land shapes to gain precious real estate. Table of Contents. |
Who will benefit
This book will be of immense value to both circuit designers as well as CAD designers, and those involved in product testing, fabrication, troubleshooting and debug of high-speed products.
Table of Contents
1 - Introduction
- Goal, Purpose, Scope
- Categories
- Terms and Abbreviations
- Dimensions
- Reference Documents
- Design Flow
2 - Design Project Objectives
- Assembly Types
- Project Initialization
- Check List
3 - Basic Rules of Design for Manufacturing
- Mechanical Restrictions
- Tooling Holes
- Fiducial Specifications
- Panels and Depaneling
- Stencils and Screens
- Parts Optimization
- Tape and Reels
4 - CAE Requirements
- Library Standards
- Test Requirements for SMT
- SMT Packages
- Down-loading to CAD Systems
- Schematic Symbols to CAD
- Symbols
5 - Rules for Land Patterns
- Land Shapes for Passives
- Land Shapes for ICs
- SOICs and QFP Land Patterns
- J-Leaded Components
- Chip Component Land Patterns
- SOT Components
- Leadless Ceramic IC Components
- Cylindrical Components
- Butt or I Lead Components
- Wave Soldering
- Origin Points
- Lands for RF Circuits
6 - CAD Systems
- New Parts
- Non-standard Parts
- Orientation
- Silk Screens
- Test Points
- Fiducial Marks
- Documentation
7 - Design for Test
- Schematics
- Bare Board Test
- In-Circuit Test
- Bar Codes
- Edge Connectors
- IC Test Clips
- Bench Level Testing
8 - Component Placement and Orientation
- Placement Grids
- Orientation Guidelines
- Standard Design
- High Density
- Ultra-High Density
- Solder Paste Process
- Wave Solder Process
9 - Placement Checklist
- New Parts
- Manufacturing
- Test
- QA/QC
- Thermal
- Mechanicals
- Check-off List
10 - Design Routing Rules
- Traces
- Lands
- Impedance
- Vias or Holes
- PC Fabrication
- High Density Design Rules
- Fine Pitch Components
- Copper Thieving
- High Speed Signals
- EMI
11 - Routing Check List PC Fabrication
- Solder Masks
- Warpage Specifications
- Plating Specifications
- Copper Specifications
- Holes
- Order of Layers
- Fiducial Specifications
- Silk Screen Specifications
- Board Thickness
- Panels for Fabrication
12 - Documentation
- Manufacturing
- Test
- PCB Fabrication
Price: $299.95
Author: James C. Blankenhorn
Edition: June 2001
Pages: full color 193 pages 8.5" x 11"
ISBN: 1-882812-03-4 |
Author: James C. Blankenhorn
James C. Blankenhorn is President and founder (1985) of SMT Plus Inc., located in Scotts Valley, California. His experience in SMT began as Vice President of Design and Prototyping for AWI, the first SMT subcontract design and assembly firm for SMT from 1983-1985. His work established many of the design guidelines and processes used in the SMT industry today. Mr. Blankenhorn sold the design and assembly operations to and was General Manager and Vice President of Design for Jabil Circuit from 1988-1991, setting up multiple design centers and managing prototype assembly. Mr. Blankenhorn returned to SMT Plus to direct its activities. Having identified the growing needs of industry for education, SMT Plus has emerged since 1996 as a leader in the production of advanced multimedia technical training products and development tools for the SMT and telecommunications industries. Prior to his involvement with SMT, Mr. Blankenhorn was a MOS designer for Motorola and TI and product line manager for memory and microprocessors for Honeywell for 8 years. For 3 years thereafter he was involved in startups in IC packaging, test and burn-in as General Manager for Test International and Vice President of Sales for IC Link.
Mr. Blankenhorn is an active member of the SMTA, a co-founder of the SMTA in 1984, recipient of the 1996 Founders Award for Distinguished Service, and served twice as technical chairman for the Silicon Valley SMTA chapter. He is a speaker at conferences worldwide and has authored over twenty books on SMT design, packaging, and processing. He holds a BSEE degree from Arizona State University and is listed in Who's Who in America.
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